1. Field of the Invention
The invention relates to manufacturing integrated circuits in general, and to manufacturing optical memory devices in particular.
2. Background of the Invention
Phase change materials may be switched from one detectable state to another detectable state by the application of energy. The states of phase change materials may differ in their morphology, relative degree of order, or relative degree of disorder, creating a detectable difference in electrical conductivity, electrical resistance, optical transmissivity, optical absorption, optical reflectivity, or any combination thereof.
Conventional systems for using phase-change material, such as chalcogenide, to implement optical data storage media may be classified into two categories. The first category includes media that are optically read and written, such as CD-Rewritable (CD-RW) memory, Powerful Optical Disk System (PD) memory, and Digital Versatile Disk RAM (DVD-RAM). The second category includes media that are electrically read and written, such as Ovonic Unified Memory (OUM).
The first category uses the optical properties of phase change material to implement memory. These optical data storage devices use a structure wherein the phase change material used as a data storage medium is supported by a substrate and encapsulated in encapsulants. The encapsulants may include anti-ablation materials, thermal insulating materials and layers, anti-reflection layers between a projected beam source and the data storage medium, reflective layers between the optical data storage material and the substrate, and the like. The structure of the optically read and written memory may be simple, and the price of the media (e.g. an optical disk) may be inexpensive. However, an optical system (e.g. DVD-RAM player) is necessary to read the data stored on the media. The optical system is relatively large and expensive as compared to the media. Moreover, the optical system is relatively slow and consumes significant power.
The second category implements memory using phase change materials that may be electrically switched between a generally amorphous state and a generally crystalline state, or between different resistive states while in crystalline form. A relatively large electrical current is required to program these memory devices. In the OUM, at least 1 mA of current is required to program each bit; however, the current required to read a bit is considerably less. In traditional metal-oxide semiconductor (MOS) integrated circuits it is very difficult to provide a source/drain current of more than 1 mA for a minimum size device. In addition, even if it were possible to provide larger source/drain currents, the relatively high power consumption would be very undesirable for many applications.
Conventional processes for manufacturing integrated circuits use a sequence of deposition and etching processes to establish electrical pathways to features of the integrated circuit. For example, a manufacturer may make an integrated circuit, such as a memory device, by using a diffusion process to establish substrate channels on a silicon semiconductor wafer. The manufacturer may use known techniques to form a crystalline epitaxial layer on top of the substrate channels. Then the manufacturer may use known masking and doping techniques to establish isolation channels in the epitaxial layer that isolate adjacent memory cells from each other.
A layer of thermally-grown SiO2 may be formed on the top of the epitaxial layer and etched to form apertures over the areas between the isolation channels in the epitaxial layer. Then diffusion regions may be formed within the areas of the apertures of the SiO2 layer, and one or more electrode contact layers may be deposited within the apertures. Next, a chalcogenide layer may be formed on top of the electrode contact layers and within the pore defined by the aperture, using known thin-film deposition techniques, and additional layers of electrode contact material may be formed on top of the chalcogenide layer.
Individual memory cells are formed by the combination of the lower electrode contact layers, the chalcogenide layer, and the upper electrode contact layers. The upper electrode contacts may be joined using electrical conductors that are arranged perpendicular to the substrate channels, such that each of these conductors is electrically coupled to a row or column of the memory cells. Finally, the integrated circuit structure may be covered with an encapsulant, such as a plastic material.
The traditional scheme for manufacturing integrated circuits is expensive and complex due in part to the many processing stages required to fabricate an integrated circuit such as a memory device.
The present invention provides methods and systems for a memory which may be optically programmed and electrically read. The complex electrical circuits previously used to program memory cells may be eliminated. Additionally, the memory may be directly read using electrical circuits at speeds much faster than possible using optical methods. Moreover, memory devices consistent with the present invention may be directly read using simple electrical circuits that consume minimal power, as compared to the relatively slow and power-hungry devices (e.g. disk drives) required to read traditional optical media. Therefore, this invention provides a fast, power-efficient memory compatible with simple electrical circuits.
The present invention also provides methods and systems for lithography and manufacturing of integrated circuits, such as memory devices, that require fewer processing steps and are less expensive to implement. This is achieved by taking advantage of temperature-dependent characteristics of certain materials, such as chalcogenides, to adjust the electrical resistance between one side of the interconnect layer and the other side of the interconnect layer.
The present invention provides for forming an electrical interconnect layer between two layers of an integrated circuit, the method comprising: forming the interconnect layer using a material having a first electrical conductivity corresponding to a first state and a second electrical conductivity corresponding to a second state, wherein the first electrical conductivity is different from the second electrical conductivity; selecting an area of the material of the interconnect layer; and applying energy to the selected area to change the electrical conductivity of the material in the selected area of the interconnect layer.
The present invention also provides a system configured to form an electrical interconnect layer between two layers of an integrated circuit, the system comprising: means for forming the interconnect layer using a material having a first electrical conductivity corresponding to a first state and a second electrical conductivity corresponding to a second state, wherein the first electrical conductivity is different from the second electrical conductivity; means for selecting an area of the material of the interconnect layer; and means for applying energy to the selected area to change the electrical conductivity of the material in the selected area of the interconnect layer.
Additional aspects of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Features of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the appended claims. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as described. Further features and/or variations may be provided in addition to those set forth herein. For example, the present invention may be directed to various combinations and subcombinations of the disclosed features and/or combinations and subcombinations of several further features disclosed below in the detailed description.